141 for(LockAnalysis::CxtStmtToCxtLockSet::iterator it = analyedLS.begin(),
142 eit = analyedLS.end(); it!=eit; it++)
145 bool interestedInst =
true;
148 if(!SVFUtil::isa<LoadStmt>(stmt) && !SVFUtil::isa<StoreStmt>(stmt))
149 interestedInst =
false;
151 if(interestedInst==
false)
157 if(LS.size() != (*it).second.size())
162 outs() <<
"Reason: The number of lock on current stmt is wrong\n";
163 outs() <<
"\n----Given locks:\n";
164 for (CxtLockSetStr::iterator it1 = LS.begin(),eit1 = LS.end(); it1 != eit1; it++)
166 outs() <<
"Lock " << *it1 <<
" ";
168 outs() <<
"\n----Analysis locks:\n";
169 for (LockAnalysis::CxtLockSet::iterator it2 = (*it).second.begin(),
170 eit2 = (*it).second.end(); it2 != eit2; ++it)
181 for(LockAnalysis::CxtLockSet::iterator it3 = LSA.begin(), eit3=LSA.end(); it3!=eit3; it3++)
187 if(!
match(lockName, LS))
191 outs() <<
"\nValidate Stmt's Lock : Wrong at (" << inst->
toString() <<
")\n";
192 outs() <<
"Reason: The number of lock on current stmt is wrong\n";
193 outs() <<
"\n Lock " << lockName <<
" should not protect current instruction\n";
const SVFValue * getArgOperand(u32_t i) const
ICFGNode * getICFGNode(NodeID id) const
Get a ICFG node.
Set< CxtLock > CxtLockSet
Map< CxtStmt, CxtLockSet > CxtStmtToCxtLockSet
CxtStmtToCxtLockSet getCSTCLS()
bool match(const std::string &lockName, CxtLockSetStr LS)
bool inFilter(const std::string &name)
static const Option< bool > PrintValidRes
static SVFIR * getPAG(bool buildFromFile=false)
Singleton design here to make sure we only have one instance during any analysis.
SVFStmtList & getSVFStmtList(const ICFGNode *inst)
Given an instruction, get all its PAGEdges.
const SVFFunction * getFunction() const
std::string toString() const
Needs to be implemented by a SVF front end.
CallSite getSVFCallSite(const SVFInstruction *inst)
Return LLVM callsite given an instruction.
bool isCallSite(const SVFInstruction *inst)
Whether an instruction is a call or invoke instruction.